Today, it is common for a product to contain a motherboard and several daughter boards.
In the following example, let us imagine that we have a daughterboard that has some high-speed signals on it. In order to minimize ground bounce on both the motherboard and the daughterboard, what is the best strategy to use? The next question is what is the best strategy to minimize emissions from common modes and, as a result, the effects on EMC?
Let's begin by analyzing a typical mistake that people make.
For the sake of simplicity let's assume that we have a four-layer motherboard, with a stack-up that looks like this: signal, gnd, vdd, signal. There is also a daughterboard with 4 layers, and it has the same stack-up as the main board: signal, vdd, ground, and signal.
Let's take a look at the two PCBs above and imagine that the layout engineers for these two PCBs designed them differently. On a motherboard, we use layer 1 (the layer closest to the ground) for the high-speed signal. While on the daughterboard, we use the layer paired to the vdd plane to trace the high-speed signal.
In this case, it will be interesting to see what happens to the return current. This will enable us to have ground bouncing between vdd, gnd and EMC, EMI issues.
In the first drawing, we can see the direction of the forward current from layer 1 (motherboard) to layer 1 daughter board.
Mother board with daughter board (forward current shown only)
The following figure illustrates the return current. It should be noted that the motherboard uses the ground plane as the image plane, while the daughter board uses the vdd plane as the image plane. It is expected that some low frequencies return currents (harmonics below 100 MHz) will close the loop using the bypass capacitor, while higher harmonics will use displacement currents.
A displacement current is a current due to the capacitor of the vdd-gnd plane.
As a result of this approach, ground bouncing will occur between the gnd and vdd, resulting in signal integrity problems. Common mode current will also be created by displacement current, resulting in high EMC emissions.
Mother board with daughter board, with 2 different return current plane (causing EMI and ground bouncing)
How can we resolve this issue?
The simplest method of accomplishing this is to use the same return path on the daughter board as well. As a result, the stack should be signal, gnd, vdd, signal. Your return path will be represented by the gnd plane. (See diagram below)
Using the same ground plane reduce emission and the return current is better controlled.
In the event that this is not possible, we may have to stitch a capacitor near your connector.
Please let me know if you are interested and we will discuss this in the next post.
Good luck and I hope you have learned what not to do when you are using a daughter board.